I try to design a circuit to make a voltage-current-voltage translation. In my assumption, probe1.v is equal to probe2.v and it will generate a current(probe2.v / R4) through NMOS. The NMOS acts as a closed switch. Probe3.v is equal to CV3 and i can get "Probe4.v = CV1 + CV3". However, when the circuit operates, probe3.v isn't equal to CV3 and probe1.v isn't equal to probe2.v. I have tried to rise the differential input resistance and differential amplifier to make the Uin+ close to Uin- in op amp, but it doesn"t work effectively.
In addition, the closed resisitance of NMOS is also taken into consideration and i try to make it pretty below Kohm.
Could you help me fix the problem?